Embodiments of the present inventive concept relate to semiconductor devices. More particularly, the inventive concept relates to a semiconductor device incorporating a voltage boosting circuit generating a lower voltage as a power supply circuit applied to the voltage boosting circuit generates a higher voltage.
Certain voltages used to drive circuitry within a memory device, (e.g., a voltage applied to a word line during some operations) may need to be higher than the power supply voltage externally provided to the memory device. Thus, memory devices commonly include so-called high voltage generating circuits that receive the external power supply voltage and generate a high voltage. The term “high voltage” in this context means a voltage greater than the power supply voltage. Various pumping circuits are conventionally used within high voltage generating circuits to generate the high voltage.
Recent evolutions in the design of memory systems require reduced overall voltage levels in order to conserve power and enable the operation of densely integrated circuits. As a result, the level of power supply voltages provided to constituent memory devices has been generally reduced. Accordingly, it has become increasingly difficult to internally generate a high voltage within memory devices. In addition, as the level of provided power supply voltages has dropped, the pumping efficiency of pumping circuits used to generate the high voltage has also dramatically dropped.
Up to now, generating a high voltage from a provided power supply voltage having a relatively low level required a voltage boosting circuit having multiple stages (e.g., at least three (3) boosting stages). The use of multiple boosting stages results in longer voltage boosting times. In addition, conventional voltage boosting circuits have increased the size of pumping capacitors. This increased capacitor size has considerable disadvantages given contemporary demands for smaller chip size.